Background Information
What Is DRAM?
DRAM
is a type of dynamic RAM memory that utilizes the charge of a capacitor
to store ones and zeros. A single piece of DRAM is composed of a
large two dimensional array of cells containing ones or zeros that are
connected by bitlines and wordlines. Each individual cell can be
accessed by utilizing the intersection of a specific wordline and
bitline, and reading from or storing to the cell at this address.
In
the idealized model, a single transistor and a single capacitor are
used to form a cell. When the wordline of the cell is high, the
transistor turns on and the capacitor can be written to or read from on
the bit line. Handy though this model is for understanding the
addressing of the cells, it would not work if it was implemented.
Figure 1
Idealized DRAM, and the problems with it One problem with the idealized model is that simply having the wordline at a logical one on would fail to turn on the transistor
if a logical 1 is stored on the capacitor due to the threshold voltage
of the transistor. This problem can be circumvented by the use of
a charge pump to bring the wordline to a voltage above logical 1
and flip the transistor on. Another problem is that the
capacitors in the cells leak over time, so a refresh routine is needed
to periodically read all of the values in the array and then rewrite
them. The final problem with the model is that each bitline has
parasitic capacitance that causes charge to be stored on the line
itself. Thus if a read operation was performed on a cell its
charge would be stored along the bitline and cause only a miniscule
change in output voltage. In order to solve this problem a sense amp is used.
Figure 2Realistic DRAM model In
this model the sense amp will clamp the bit line voltage to be a
logical 1 or 0 before reading and writing. The process is shown
in the following figure.
Figure 3Flowchart of what happens to the LEDs iin the process of a write and read
This
shows the working of a single cell, but during DRAM fabrication there
is always the chance of creating a cell that doesn't work. For
this eventuality excess cells are created in the array. If a
computer tries to read from or write to a broken cell it detects that the cell is broken and rewrites the address of that cell to one of the excess cells.